Googlers and UC Berkeley academics say they have devised a way to use artificial intelligence to design faster and smaller chips that accelerate artificial intelligence.
In a note shared on Thursday, the researchers said they have developed a deep-learning approach called PRIME that generates AI chip architectures by drawing from existing blueprints and performance figures. They claim their approach can produce designs that have lower latency and require less space than Google's in-production EdgeTPU accelerator and other designs made using traditional tools.
Google has quite an interest in this area. Last year, it said it had used machine learning to optimize the layout of one of its TPU designs. Meanwhile, traditional chip design toolmakers, such as Synopsys and Cadence, say they've added machine-learning to their software suites.
https://www.theregister.com/2022/03/18/google_deep_learning_chip_design/
Tekoäly suunnittelee tekoälypiirejä. Tälläinen kehitys mahdollisesti räjäyttää tehojen kasvun, koska yhä tehokkaampi tekoäly voi kehittää tehokkaampia tekoälypiirejä.
Ei kommentteja:
Lähetä kommentti